Technical articles
VMIC VMIVME-7750 Datasheet | VME Single Board Computer
Date: May 14, 2024 Views: 141
Functional Characteristics
DRAM Memory:
The VMIVME-7750 accepts one 144-pin SDRAM SODIMM for a maximum memory capacity of 512 Mbyte. The DRAM is dual ported to the VME.
BIOS:
System and video BIOS are provided in reprogrammable flash memory.
Super VGA Controller:
High resolution graphics and multimedia-quality video are supported on the VMIVME-7750 by a built-in 815E chipset AGP graphics adapter. The adapter is complemented by 4 Mbyte external synchronous DRAM cache with a high-bandwidth 64-bit data interface. Screen resolutions up to 1,600 x 1,200 x 256 colors (single view mode) are supported by the graphics adapter.
Ethernet Controller:
The VMIVME-7750 supports Ethernet LANs with two Intel Ethernet controllers (one 82559 and the other internal to Intel’s chipset ICH2). 10BaseT and 100BaseTX options are supported via two RJ45 connectors. Remote LAN booting is supported.
Remote Ethernet Booting:
The VMIVME-7750 utilizes Lanworks Technologies, Inc.’s BootWare®. BootWare provides the ability to remotely boot the VMIVME-7750 using NetWare, TCP/IP, or RPL network protocols.
BootWare Features:
NetWare, TCP/IP, RPL network protocol support;
Unparalleled boot sector virus protection;
Detailed boot configuration screens;
Comprehensive diagnostics;
Optional disabling of local boots;
Dual-boot option lets users select network or local booting.
Serial Ports:
Two 16550-compatible serial ports are featured on the VMIVME-7750 front panel. The serial channel has a 16-byte FIFO to support baud rates up to 115 Kbaud. Requires two micro-DB-9 to standard DB-9 adapters, GE Fanuc P/N 360-010050-001.
Keuboard and Mouse Ports:
The VMIVME-7750 has a combinedPS/2 keyboard and mouse connector. A Y-adapter cable is included.
Flash Memory:
The VMIVME-7750 provides upto 1 Gbyte of IDECompactFlash memory accessible throughthe secondary IDE CompactFlast. The VMIVME-7750BIOS includes an option to allow theboard to boot from the Flash memory.
Timers:
The VMIVME-7750 provides the user with two 16-bit timers and two 32-bit timers (in addition to system timers). These timers are mapped in l/O space, and are completely software programmable.
Watchdog Timer:
The VMIVME-7750 provides a software-programmable watchdog timer. The watchdog timer is enabled under software control. Once the watchdog timer is enabled, software must access the timer within the specified timer period or a timeout will occur. A user jumper allows the timeout to cause a reset. lndependent of the jumper, software can enable the watchdog timeout to cause a nonmaskable interrupt (NMII) or a VMEbus SYSFAIL.
Nonvolatile SRAM:
The VMIVME-7750 provides 32 Kbyte of nonvolatile SRAM. The contents of the SRAM are preserved when +5V power is interrupted or removed from the unit.
PMC Expansion Site:
The VMIVME-7750 supports lEEE P1386 common mezzanine card specification with a 5V PCl mezzaninecard (PMC) expansion site. The PMC site provides for standard I/O out the VMEbus front panel. An optional l/O connection to the VMEbus P2 connection can be provided. Contact GE Fanuc Embedded Systems for more information concerning PMC modules and compatibility.
Universal Serial Bus (USB):
The VMIVME-7750 provides a frontpanel dual connection hub host controller for the USB.
Supported USB features include:
isochronous data transfers, asgnchronous messaging, self-identification and configuration of peripherals, and dynamic (hot) attachment.
VMEbus lnterface:
The VMIVME-7750 VMEbus interface is basedon the Universe llB high performance PCl-to-VME interface from Newbridge/Tundra.
System Controller:
The VMEbus system controller capabilities allow the board to operate as a slot 1 controller, or it may bedisabled when another board is acting as the system controller.
The system controller may be programmed to provide the following modes of arbitration:
Round Robin (RRS)
Single Level (SGL)
Priority (PRI)
The system controller provides a SYSCLK driver, IACK* daisychain driver, and a VMEbus access timeout timer. The system controller also provides an arbitration timeout if BBSY* is not seen within a specified period after a BGOUT* signal is issued. This period is programmable for 16 or 256 µs.
VMEbus Requester:
The microprocessor can request and gain control of the bus using any of the VMEbus request lines (BR3* to BR0*) under software control.
The requester can be programmed to operate in any of the following modes:
Release-On-Request (ROR)
Release-When-Done (RWD)
VMEbus Capture and Hold (BCAP)
Mailboxes:
The VMEbus interface provides four 32-bit mailboxes, which are accessible from both the microprocessor and the VMEbus providing interprocessor communication. The mailboxes have the ability to interrupt the microprocessor when accessed by VMEbus.
Interrupt Handler:
The interrupt handler monitors, and can be programmed to respond to any or all VMEbus IRQ* lines. All normal-process VMEbus-related interrupts can be mapped to PCI INTA# or SERR# interrupts.
These include:
Mailbox interrupts
VMEbus interrupts
VMEbus interrupter IACK cycle (acknowledgment of VMIVME-7750 VMEbus-issued interrupts)
All error processing VMEbus-related interrupts can be mapped to PCI INTA# or SERR#. Note: PCI SERR# initiates a SBC NMI.
These include:
ACFAIL* interrupt
BERR* interrupt
SYSFAIL* interrupt
The interrupt handler has a corresponding STATUS/ID register for each IRQ* interrupt. Once the handler receives an IRQ*, it requests the VMEbus and, once granted, it performs an IACK cycle for that level. Once the IACK cycle is complete and the STATUS/ID is stored in the corresponding ID register, an appropriate interrupt status bit is set in an internal status register, and a PCI interrupt is generated. The PCI interrupt can be mapped to PCI INTA# or SERR#.
Product recommendation:
RELATED ARTICLE
Address
Room 205, Office Building, No.1 Chaoyang North Road, Longwen District, Zhangzhou City, Fujian Province
fengyunfadacai@qq.com
Sales consultant
Miss.Green
+86 15860249102
